VLSI Design and Embedded System

June 2010 to august 2011 - Assistant professor in KIIT University,Bhubaneswar,odisha . September 2011 (continuing) - Assistant Professor in VSSUT Burla, Odisha

Digital VLSI, Computer Architecture, Quantum computing, Nano Magnetic Logic

International Publications

1. Bhoi, B. K., Misra, N. K., & Pradhan, M. (2019). Analysis on Fault Mapping of Reversible Gates with Extended Hardware Description Language for Quantum Dot Cellular Automata Approach. Sensor Letters, 17(5), 371-378.
2. Barik, R. K., Bhoi, B. K., & Pradhan, M. (2018). An efficient redundant binary adder with revised computational rules. Computers & Electrical Engineering, 72, 224-236.
3. Bhoi, B. K., Misra, N. K., & Pradhan, M. (2018). Design of magnetic dipole based 3D integration nano-circuits for future electronics application. International Journal of Nano Dimension, 9(4), 374-385.
4. Bhoi, B. K., Misra, N. K., & Pradhan, M. (2018). A novel vedic divider based crypto-hardware for nanocomputing paradigm: An extended perspective. International Journal of Nano Dimension, 9(4), 336-345.
5. Bhoi, B., Misra, N. K., & Pradhan, M. (2017). Design and evaluation of an efficient parity-preserving reversible QCA gate with online testability. Cogent Engineering, 4(1), 1416888.
6. Misra, N. K., Sen, B., Wairya, S., & Bhoi, B. (2017). Testable novel parity-preserving reversible gate and low-cost quantum decoder design in 1D molecular-QCA. Journal of Circuits, Systems and Computers, 26(09), 1750145.
7. Bhoi, B. K., Misra, N. K., & Pradhan, M. (2017). A universal reversible gate architecture for designing n-bit comparator structure in quantum-dot cellular automata. International Journal of Grid and Distributed Computing, 10(9), 33-46.
8. Padhan, S. K., Gadtia, S., & Bhoi, B. (2016). FPGA based implementation for extracting the roots of real number. Alexandria Engineering Journal, 55(3), 2849-2854.
9. Sahu, S. R., Bhoi, B. K., & Pradhan, M. (2020). Fast signed multiplier using Vedic Nikhilam algorithm. IET Circuits, Devices & Systems, 14(8), 1160-1166.
10. Bhoi, B. K., Misra, N. K., & Pradhan, M. (2020). Synthesis and simulation study of non-restoring cell architecture layout in perpendicular nano-magnetic logic. Journal of Computational Electronics, 19(1), 407-418.
11. Gadtia, S., Padhan, S. K., & Bhoi, B. K. (2020). Square root formulae in the Śulbasũtras and Bakhshãlĩ manuscript. Journal of Interdisciplinary Mathematics, 23(1), 1-10.
12. Pathak, N., Kumar, S., Misra, N. K., & Bhoi, B. K. (2019). A modular approach for testable conservative reversible multiplexer circuit for nano-electronic confine application. International Nano Letters, 9(4), 299-309.
13. A High Speed Divider Architecture Using Paravartya Sutra of Vedic Mathematics.( International Journal of Applied Engineering Research,volume 10,2015)